Information Exposure through Microarchitectural State after Transient Execution

Opis

The processor does not properly clear microarchitectural state after incorrect microcode assists or speculative execution, resulting in transient execution.

In many processor architectures an exception, mis-speculation, or microcode assist results in a flush operation to clear results that are no longer required. This action prevents these results from influencing architectural state that is intended to be visible from software. However, traces of this transient execution may remain in microarchitectural buffers, resulting in a change in microarchitectural state that can expose sensitive information to an attacker using side-channel analysis. For example, Load Value Injection (LVI) [REF-1202] can exploit direct injection of erroneous values into intermediate load and store buffers.

Several conditions may need to be fulfilled for a successful attack:

1. incorrect transient execution that results in remanence of sensitive information;

1. attacker has the ability to provoke microarchitectural exceptions;

1. operations and structures in victim code that can be exploited must be identified.

Skutki

• Confidentiality, Integrity

  Modify Memory; Read Memory; Execute Unauthorized Code or Commands

Zapobieganie

• Architecture and Design, Requirements

  Hardware ensures that no illegal data flows from faulting micro-ops exists at the microarchitectural level.

  Skuteczność: High

• Build and Compilation

  Include instructions that explicitly remove traces of unneeded computations from software interactions with microarchitectural elements e.g. lfence, sfence, mfence, clflush.

  Skuteczność: High

Przykłady podatności

• CVE-2020-0551 Load value injection in some processors utilizing speculative execution may allow an authenticated user to enable information disclosure via a side-channel with local access.

Słabość nadrzędna

• CWE-226 Sensitive Information in Resource Not Removed Before Reuse

Kiedy powstaje

• Architecture and Design
• Requirements

Dotyczy

Not Language-Specific, Not OS-Specific, Workstation, x86, ARM, Other, Not Technology-Specific, System on Chip

Uwagi

CWE-1342 differs from CWE-1303, which is related to misprediction and biasing microarchitectural components, while CWE-1342 addresses illegal data flows and retention. For example, Spectre is an instance of CWE-1303 biasing branch prediction to steer the transient execution indirectly.

As of CWE 4.9, members of the CWE Hardware SIG are closely analyzing this entry and others to improve CWE's coverage of transient execution weaknesses, which include issues related to Spectre, Meltdown, and other attacks. Additional investigation may include other weaknesses related to microarchitectural state. As a result, this entry might change significantly in CWE 4.10.

Źródła

1. LVI - Hijacking Transient Execution with Load Value Injection — Jo Van Bulck, Daniel Moghimi, Michael Schwarz, Moritz Lipp, Marina Minkin, Daniel Genkin, Yuval Yarom, Berk Sunar, Daniel Gruss, and Frank Piessens, 2020
2. LVI: Hijacking Transient Execution through Microarchitectural Load Value Injection — Jo Van Bulck, Daniel Moghimi, Michael Schwarz, Moritz Lipp, Marina Minkin, Daniel Genkin, Yuval Yarom, Berk Sunar, Daniel Gruss, and Frank Piessens, 2020
3. Hijacking Transient Execution through Microarchitectural Load Value Injection — 2020
4. CacheOut: Leaking Data on Intel CPUs via Cache Evictions — Stephan van Schaik, Marina Minkin, Andrew Kwong, Daniel Genkin, Yuval Yarom, 2020