CWE-1262 · Słabość
Improper Access Control for Register Interface
- Abstrakcja
- Bazowa
- Status
- Stabilny
- Dodano
- 8 maja 2020
- Ostatnia zmiana
- 11 grudnia 2025
Opis
The product uses memory-mapped I/O registers that act as an interface to hardware functionality from software, but there is improper access control to those registers.
Software commonly accesses peripherals in a System-on-Chip (SoC) or other device through a memory-mapped register interface. Malicious software could tamper with any security-critical hardware data that is accessible directly or indirectly through the register interface, which could lead to a loss of confidentiality and integrity.
Skutki
Confidentiality, Integrity
Read Memory; Read Application Data; Modify Memory; Modify Application Data; Gain Privileges or Assume Identity; Bypass Protection Mechanism; Unexpected State; Alter Execution Logic
Confidentiality of hardware assets may be violated if the protected information can be read out by software through the register interface. Registers storing security state, settings, other security-critical data may be corruptible by software without correctly implemented protections.
Zapobieganie
Architecture and Design
Design proper policies for hardware register access from software.
Implementation
Ensure that access control policies for register access are implemented in accordance with the specified design.
Przykłady podatności
- CVE-2014-2915 virtualization product does not restrict access to debug and other processor registers in the hardware, allowing a crash of the host or guest OS
- CVE-2021-3011 virtual interrupt controller in a virtualization product allows crash of host by writing a certain invalid value to a register, which triggers a fatal error instead of returning an error code
- CVE-2020-12446 Driver exposes access to Model Specific Register (MSR) registers, allowing admin privileges.
- CVE-2015-2150 Virtualization product does not restrict access to PCI command registers, allowing host crash from the guest.
Słabość nadrzędna
Kiedy powstaje
- Architecture and Design — This weakness may be exploited if the register interface design does not adequately protect hardware assets from software.
- Implementation — Mis-implementation of access control policies may inadvertently allow access to hardware assets through the register interface.
Dotyczy
Not Language-Specific, Not OS-Specific, Not Architecture-Specific, Not Technology-Specific
Źródła
- Hackatdac19 csr_regfile.sv — 2019
- The RISC-V Instruction Set Manual — Andrew Waterman, Yunsup Lee, Rimas Avižienis, David Patterson, Krste Asanović, 2016
- csr_regfile.sv — Florian Zaruba, Michael Schaffner, Andreas Traber, 2019
Wpis z katalogu CWE 4.20.